This listing was posted on Supost.
FPGA Design Engineer - ALGO LOGIC
Location:
Stanford, CA
Description:
Algo-Logic Systems is seeking an experienced FPGA logic designer to implement next-generation IP cores and applications for electronic trading, data center object store, and other hardware-accelerated network applications. Algo-Logic's IP cores are currently deployed in systems that require ultra low-latency Ethernet, TCP/IP networking, and/or associative lookup. We are extending our IP library to meet the needs of applications in additional domains. You should be an experienced FPGA logic designer ready and able to design, develop, and deploy logic on devices from Xilinx and Intel on multiple card platforms. The logic will be deployed on both PCI cards and hybrid CPU and FPGA systems, meaning that the designs must support both a classical PCI interface (MMIO and DMA) as well as modern cache-coherent interfaces with atomic operations. Experience with coherent memory models like CAPI and CCI-P are highly desirable. Job Responsibilities • Design and implement algorithms directly in FPGA logic with C/C++ using High Level Synthesis (HLS) or Verilog for Register Transfer Language (RTL) • Implement fine-grained communication and synchronization between software and hardware • Develop reusable and composable IP cores • Verify correctness through simulation and test-benches • Measure performance through cycle-accurate simulation and live testing • Working with customers to interpret requirements and specifications • Experiment with designs in live system Required Skills • Degree in Electrical or Computer Engineering • At least three years of experience coding in Verilog or System Verilog • Experience working with on-chip RAM and host-attached memory • Hands-on debugging of complete systems in FPGA logic • Skills with verification using randomized testing • Understanding of OSI network stack layers 2-7 • Experience performing latency optimizations • Proficiency in writing documentation • Experience with scripting in Python, Perl, bash, and/or TCL. Preferred Skills • Synthesis with latest tools from Xilinx and Intel (was Altera) • Simulation using Questa Modelsim • Programming with PCI using MMIO and DMA • Code management using Git repositories • Key-value store (MongoDB, Redis, Memcache, etc.) To apply, please directly submit an employment inquiry. • This position is for on-site work in San Jose, CA (not remote work) • Algo-Logic has a safe workplace with 100% employee vaccination • Algo-Logic provides benefits to employees that include health care, 401k with employer matching, free snacks, and on-site electric vehicle (EV) charging. • No calls from agencies or recruiters will be returned https://www.algo-logic.com/fpga-logic-designer
Posted:
November 10 2023 on Supost
Visit Our Partner Website
This listing was posted on another website. Click here to open: Go to Supost
Important Safety Tips
- Always meet the employer in person.
- Avoid sharing sensitive personal and financial information.
- Avoid employment offers that require a deposit or investment.
To learn more, visit the Safety Center or click here to report this listing.
More About this Listing: FPGA Design Engineer - ALGO LOGIC
FPGA Design Engineer - ALGO LOGIC is a Engineering Design Engineer Job located in Stanford CA. Find other listings like FPGA Design Engineer - ALGO LOGIC by searching Oodle for Engineering Design Engineer Jobs.
FPGA Design Engineer - ALGO LOGIC is a Engineering Design Engineer Job located in Stanford CA. Find other listings like FPGA Design Engineer - ALGO LOGIC by searching Oodle for Engineering Design Engineer Jobs.