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Sort Interface Design Pathfinding and Development Engineer
Location:
Hillsboro, OR
Description:
Job Description The Assembly and Test Technology Development (ATTD) group at Intel develops industry-leading microelectronic packaging technologies for Intel's Client and Data Center CPUs, Graphics and Networking products, and Intel Foundry Services customers.This position is to seek for a Sort Interface Design Pathfinding and Development Engineer in the Sort Interface Development department within Assembly and Test Technology Development (ATTD) organization.Sort Interface Development Team Develops Silicon Interface Probing Technologies that achieves best in class reliable sort/test capability for Intel leading manufacturing process nodes and advanced package technologies.This team at Intel designs every product interface unit (SIU) to enable sort testing the entirety of Intel's product portfolio across all sources of products (Client, Server, System-on-a-chip, 5G products, FPGA). Future test tooling solutions need innovative out-of-the-box solutions to meet the power and signal integrity requirements of future products.In this role, the candidate will manage pathfinding and development activities to enable all future IP features and full chip integration testing needs across all of Intel products.Applicant will lead projects of electrical pathfinding and development which may include: Defining Design rules for ensuring performance expectations will be met in PCBs, space transformer/package and probe arrays Implementing automated verification methods for the Design Rules across the ecosystem (Si design runsets, diefile/FIELD checks, supplier verification systems, etc.) Defining the HSIO and power delivery hardware and methods roadmap with all Business Unit (BU) partners Developing electrical design rules through measurement and simulation to achieve the product requirements Defining with Si design and BU partners DFT/test method innovations to meet product requirements Enabling new test methods, DFT and Sort process control measurements for testing pre-packaged silicon die across all packaging/assembly roadmap offerings The ideal candidate must exhibit the following behavior traits: Technical problem-solving skills Willingness to independently drive improvements. Willingness to multitask with good tolerance of ambiguity. Excellent communication skills Qualifications For information on Intel's immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information . You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences. Minimum Qualifications: Possess a Bachelor's with 6+ years' experience, Or Master's degree with 3+ years of experience or PhD degree with 1+ years of experience in Electrical Engineering, Physics or related Engineering field and related industry. Preferred qualifications: Demonstrated history of managing projects and hitting a committed schedule Package design experience PCB / Package design experience Familiar with electrical simulation packages from Cadence, ANSYS, ADS Strong Electrical Engineering fundamentals (analog/digital circuit, signal/power integrity, etc.) Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Working Model This role will require an on-site presence.Requisition #: JR0262205pca3lyuhf
Company:
Intel
Posted:
April 12 on ITJobsWeb
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More About this Listing: Sort Interface Design Pathfinding and Development Engineer
Sort Interface Design Pathfinding and Development Engineer is a Engineering Development Engineer Job at Intel located in Hillsboro OR. Find other listings like Sort Interface Design Pathfinding and Development Engineer by searching Oodle for Engineering Development Engineer Jobs.
Sort Interface Design Pathfinding and Development Engineer is a Engineering Development Engineer Job at Intel located in Hillsboro OR. Find other listings like Sort Interface Design Pathfinding and Development Engineer by searching Oodle for Engineering Development Engineer Jobs.