Senior Design Verification Engineers
Location:
Dallas, TX
Description:
A Kforce client in Dallas, Texas is seeking exceptional Verification engineers to help drive Digital Verification for complex Mixed-Signal ICs.This Engineer will work in a team-orientated environment to deliver advanced verification components.As a key member of the team, he/she will be responsible for:Understanding the expected design functionalityWork independentlyDeveloping verification plansImplement verification infrastructure based on cutting edge methodologies and toolsUVM based Verification component development for Mixed-Signal designsCoverage closure using advanced analysisMethodology supportOperation and maintenancePre-and post-silicon verification and debug to achieve verification goalsMust be a good team player and have the ability to handle all verification implementation tasks independently in a multi-disciplinary team environmentMust have a good understanding of advanced verification methodologies - Metrics and Plan Driven Verification and have hands-on experience with: UVM / OVM / ERMRequirements:An MSEE or MSCE Degree with 8+years of directly related industry experience in ASIC / SoC VerificationExpert-level knowledge of test-bench development using Object Orientation System VerilogHands-on experience and expert-level knowledge of advanced verification methodologies (OVM / UVM System Verilog)Must have UVM development experience with System VerilogDevelopment experience developing UVM components is requiredKnowledge and exposure to Mixed Signal Verification is highly desiredExpert level knowledge of Coverage Driven Verification - Coverage Model design and implementation using HVLsVerification PlanningAssertion based checks (PSL / SVA)Team-player: ability to forge and maintain relationships with peer-organistsSimulation and debugging experienceGate-level bring upScripting: Perl / Ruby / TclGood communication skillsPluses:Experience with Mixed Signal verification is desiredExperience with Assertions and Coverage for Analog/Mixed-Signal is desiredModeling of analog (Real Number Models)Low Power VerificationFormal VerificationExperience with Cadence based Verification tools: IUS, ePlanner, eManager, IFV and ConformalTLMExperience working with off-shore flex resourcesFor consideration, please send your resume to Paul Montoya at (click to respond).Listing originally posted at http://www.ihispano.com/job-search/senior-design-verification-engineers.6378465.html
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More About this Listing: Senior Design Verification Engineers
Senior Design Verification Engineers is a Engineering Engineer Job at Kforce located in Dallas TX. Find other listings like Senior Design Verification Engineers by searching Oodle for Engineering Engineer Jobs.
Senior Design Verification Engineers is a Engineering Engineer Job at Kforce located in Dallas TX. Find other listings like Senior Design Verification Engineers by searching Oodle for Engineering Engineer Jobs.